Modeling of Total Parameter Variations

Aggressive downscaling of CMOS devices in every technology generation resulted in higher integration density and performance. At the same time, yield, which is the ratio of flawless versus all fabricated chips, drastically decreased. Failed chips are divided in defect devices (defect yield) and devices, which failed the desired performance (parametric yield). Parameter variations, which strongly increase with reduced technology sizes, are responsible for decreasing parametric yield [1]. Parameter variations are divided into intra-die and inter-die variations. Due to the latter, the same circuits might have different characteristics on different dies. Intra-die variations are the variations of transistor characteristics within a single chip. Both kinds of variations are expected to be truly random in nature [2]. The parameter variations are based on different effects, such as variations in process parameters, temperature, or supply voltage. These variations lead to changes in transistor characteristics, which might result in longer delays. In established static timing analysis (STA), which is used to determine circuit performance, the effect of parameter variation is modeled with corner-case models. Each gate is set to its worst-case delay value at this corner-case timing analysis. Signal arrival times at the output of a gate are estimated by adding the gate delay to the signal arrival time at the inputs. Corner-case STA is based on assumptions of inter-die variations only. But, intra-die variations cannot be ignored in technologies with gate length below 100nm [1]. Hence, traditional corner-case STA is quite pessimistic and underestimates the value for typical performance and overestimates the worst-case timing behavior [3]. In contrast, statistical static timing analysis (SSTA) considers intra-die variations. The gate delay is based on probability functions. Hence, signal arrival times are modeled as probabilistic functions. The delay variability can be described with cumulative probability distribution function (CDF) or probability density function (PDF). A CDF describes the probability that the delay is lower than a given value x. In contrast, a PDF describes the probability that the delay has the value x: